DATE 2009

11.4 Decomposition and Restructuring Techniques for Logic Synthesis

Date: 
Thu, 2009-04-23
Time: 
14:00 - 15:30
Location / Room: 
Thalie, Level 3

Moderators: 
S Nowick, Columbia U, US
F Fummi, Verona U, IT

This session considers a variety of decomposition and restructuring techniques, both for combinational and sequential circuits.  The first paper proposes systematic techniques for manipulating circuits for complex arithmetic equations.  The second and third papers explore novel decomposition strategies, either using implicit representations or extending Shannon co-factoring.  The fourth paper addresses register placement for local clock structure optimisation.

1400 ALGEBRAIC TECHNIQUES TO ENHANCE COMMON SUB-EXPRESSION EXTRACTION FOR POLYNOMIAL SYSTEM SYNTHESIS
S Gopalakrishnan and P Kalla, Utah U, Salt Lake City, US
1430 SEQUENTIAL LOGIC SYNTHESIS USING SYMBOLIC BI-DECOMPOSITION
V Kravets, IBM TJ Watson Research Center, US
1500 (S) ON DECOMPOSING BOOLEAN FUNCTIONS VIA EXTENDED COFACTORING
A Bernasconi, Pisa U, IT
V Ciriani and G Trucco, Milano U, IT
T Villa, Verona U, IT
1515 (S) NOVEL REGISTER PLACEMENT FOR HIGH-PERFORMANCE CIRCUITS
M-F Chiang, Waseda U, JP
T Okamoto, NEC Corporation, JP