Call for Participation - Posters
Date: Friday 24th April - Location: Nice, France
We are currently soliciting participation at this workshop by poster presentation.
Call for Participation - Posters
Date: Friday 24th April - Location: Nice, France
We are currently soliciting participation at this workshop by poster presentation.
If you would like to exhibit a poster on work relevant to IC process variability at the workshop, please submit a title and brief abstract by email to pete.sedcole@imperial.ac.uk. There will be two dedicated poster sessions during the workshop as well as the opportunity to give a 1-2 minute 'advertisement' to the workshop attendees.
The following is an overview of the workshop topic - for more information, including the programme, please visit:
http://www.date-conference.com/date09/conference/date09-workshop-W2
Workshop Description:
Integrated circuit technology continues to shrink. Mainstream semiconductors are in production at the 45nm technology node, where transistors and wires measure less than 100 atoms across. The discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die.
Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances. Instead, new technology or design methods must manage these problems in order for scaling to continue. Within-die performance variation also imposes new challenges for test methods. Test hardware must be embedded in the design to detect errors dynamically, isolate and confine faults, reconfigure the system to work around faults using spare hardware, and recover from errors on the fly.
This workshop will provide a forum for researchers from industry and academia where the latest results can be presented and ideas exchanged between those working on different approaches to dealing with variability.
Organisers:
Pete Sedcole, Imperial College London, UK
Scott Roy, University of Glasgow, UK
Mark Zwolinski, University of Southampton, UK