Many-core hardware accelerators offer significant speedup for parallel applications in different computing segments. Some are originally architected for general-purpose parallel computing while others, like Graphics Processing Units (GPUs), are initially designed for graphics applications, only. GPUs are intensively used today for general-purpose computing (GPGPU computing paradigm) through the employment of effective software development frameworks. GPUs and other accelerators have penetrated a very wide range of applications: from embedded and low-power devices to the highest performance super-computers.
This workshop focuses on an important aspect of GPUs and massively parallel hardware accelerators:
dependability and corresponding performance and power/energy considerations. GPUs and accelerators implemented in modern manufacturing technologies are vulnerable (like all other chips) to transient as well as to permanent faults due to radiation, manufacturing defects, variability, aging, etc. In general-purpose computing, the correctness of operation has a much higher priority than in graphics and the applications are expected to deliver correct and fast results. Such dependability provision can be realized at the circuit level, the architectural level, the software level or a combination. However, dependability support significantly affects: (a) the delivered performance of the application, and (b) its power/energy consumption behavior.
Topics to be discussed in the workshop include (but are not limited to) the following:
Paper submission deadline: November 12, 2013.
Author notification: December 10, 2013.
Final paper deadline for inclusion in the informal digest (optional): February 15, 2014.