Organisers:
Pascal Vivet, CEA-LETI, FR
Alex Yakovlev, Newcastle U, UK
Speakers:
Alex Yakovlev, Newcastle U, UK
Jens Sparso, TU Denmark, DK
Yvain Thonnart, CEA-LETI, FR
Pascal Vivet, CEA-LETI, FR
The growing variability and complexity of advanced CMOS technologies makes the physical design of clocked logic in large Systems-on-Chip (SoC) more and more challenging. Asynchronous logic has been studied for many years and become an attractive solution for a broad range of applications, from massively parallel multi-media systems to systems with ultra-low power consumption, energy autonomous systems, and sensor-network nodes.
The objective of this tutorial is to give a comprehensive overview of asynchronous logic. The tutorial covers the basic principles and advantages of asynchronous logic, as well as deeper insights such as high level modelling, synthesis methods, architecture issues such as arbitration or de-synchronisation techniques. The tutorial also presents the Globally Asynchronous and Locally Synchronous (GALS) design style as an intermediate design solution which is particularly adapted to Network-on-Chip (NoC) architectures. The tutorial finally provides an overview of state-of-the-art circuits and start-up companies.
This tutorial targets VLSI design engineers, technical managers, researchers and students working in the area of SoC design and all those who would like to know more about these technologies that are becoming more and more mature.