4.7 Extraction and Model Order Reduction
Date:
Tue, 2010-03-09Time:
17:00 - 18:30Location / Room:
Konferenz 5Moderators:
T Dhaene, Ghent U, BE
L M Silveira, INESC ID / IST – TU Lisbon, PT
The papers in this session deal with various problems in interconnect extraction and compression of the resulting models. The first two papers address important issues in extraction, presenting novel and efficient methods to account for the effect of variations and the presence of the substrate in 3D interconnects. The last two papers discuss improvements in sampling based order reduction and passivity enforcement in boundary element simulations of interconnect systems.
| 1700 | VARIATION-AWARE INTERCONNECT EXTRACTION USING STATISTICAL MOMENT PRESERVING MODEL ORDER REDUCTION T A El-Moselhy and L Daniel, MIT, US |
| 1730 | EFFICIENT 3D HIGH-FREQUENCY IMPEDANCE EXTRACTION FOR GENERAL INTERCONNECTS AND INDUCTORS ABOVE A LAYERED SUBSTRATE N Srivastava, Mentor Graphics Corporation, US R Suaya, Mentor Graphics Corporation, FR K Banerjee, UC Santa Barbara, US |
| 1800 | HORUS - HIGH-DIMENSIONAL MODEL ORDER REDUCTION VIA LOW MOMENT-MATCHING UPGRADED SAMPLING J Fernandez Villena, INESC ID / IST - TU Lisbon, PT L M Silveira, INESC ID / IST - TU Lisbon / Cadence Research Labs, PT |
| 1815 | ON PASSIVITY OF THE SUPER NODE ALGORITHM FOR EM MODELING OF INTERCONNECT SYSTEMS M Ugryumova, TU Eindhoven, NL W H A Schilders, TU Eindhoven and NXP Semiconductors, NL |
| IPs | IP2-7 |
| 1830 | CLOSE |
