This session discusses new technologies and design ideas for 3D chips, memories and atomic-scale computing.  The first paper presents a self-reference sensing scheme for memories, resolving large bit-to-bit variations of magnetic tunnelling junctions.  The second paper proposes a Pseudo-CMOS design style for flexible electronics.  It uses only mono-type thin-fin transistors, and has a comparable performance than complementary-type designs.  The third paper proposes a redundancy scheme improving timing closure and fault tolerance of 3D stacked chips.  Finally, the last paper explores the prospect of atomic-scale computing in nonferromagnetic lattices or spin-glasses.