Organiser:
F Schirrmeister, Synopsys, DE
Moderator:
B Moyer, TechFocus Media, US
Panellists:
J Kunkel, Synopsys, DE
C Rowen, Tensilica, US
E Haritan, CoWare, US
Y Tanurhan, Virage Logic, US
This panel will explore the trends in IP re-use and discuss where IP blocks end and systems start. Furthermore, it will also explore the trends in IP-reuse and assembly, assess the state of the art of IP assembly and co-simulation standards like IP-XACT and OSCI TLM-2.0. Starting from IP assembly approaches at the RT-level, the panel will chart the direction where IP assembly will go from here towards re-use and assembly at the transaction level.
| 1300 | LUNCH BREAK |