10.4 Architectures for Next Generation Wireless Communication
Date:
Thu, 2010-03-11Time:
11:00 - 12:30Location / Room:
Konferenz 2 Moderators:
F Kienle, TU Kaiserslautern, DE
F Clermidy, CEA-LETI, FR
The first part of the session focuses on MIMO detection with a long presentation, followed by an additional short presentation. The second part of the session addresses two distinct approaches to on chip communication architectures: NoC and bus based architectures. The session concludes with a presentation of a 150Mbit/s LTE turbo code decoder for an industrial application.
| 1100 | LOW-COMPLEXITY AND HIGH THROUGHPUT VLSI ARCHITECTURE OF SOFT-OUTPUT ML MIMO DETECTOR T Cupaiuolo and M Siti, STMicrolectronics, IT A Tomasoni, Politecnico di Milano, IT |
| 1130 | LOW COST MULTI-STANDARD NEAR-OPTIMAL SOFT-OUTPUT SPHERE DECODER:ALGORITHM AND ARCHITECTURE O Paker, ST Ericsson, NL S Eckert and A Bury, Blue Wonder Communications GmbH, DE |
| 1145 | LEVERAGING APPLICATION-LEVEL REQUIREMENTS IN THE DESIGN OF A NOC FOR A 4G SoC - A CASE STUDY I Walter, I Cidon and A Kolodny, Technion - Israel Institute of Technology, IL R Beraha, Qualcomm, US |
| 1200 | DOMAIN SPECIFIC ARCHITECTURE FOR NEXT GENERATION WIRELESS COMMUNICATION B Zhang, H Liu, H Zhao, FM and T Chen, National U of Defense Technology, PRC |
| 1215 | A 150MBIT/S 3GPP LTE TURBO CODE DECODER M May, T Ilnseher and N Wehn, Kaiserslautern U, DE W Raab, Infineon Technologies AG, DE |
| IPs | IP5-4 |
| 1230 | LUNCH BREAK |
