System-Level Test and Debug is covered in Session 3.5 where transaction-level debug, compression of debug data, fault emulation in an automotive context, and test infrastructure design for 3D stacked dies are considered.

Advances in Design-for-Test for memories and multiple-voltage designs are illustrated through presentations in Session 10.5 describing how to improve the testability of SRAM stability faults using word-line modulation and how to reduce the number of voltage settings for testing multiple voltage designs using an algorithm for gate resizing.

Diagnosis and Debug is the key to short time-to-market and high yield in DSM technologies. Volume diagnosis of intra-gate defects, analysis of the data collected during silicon debug, selection of a fault model for diagnosing an observed response, and generation of compressed test patterns for multiple scan chain diagnosis are discussed in Session 8.5.

For modern designs, the Generation of Test sets under different constraints is of great importance. Session 9.5 show how to generate small test sets owing to a scalable method, how to generate compact test sets with high defect coverage, and how to generate test patterns by taking power considerations into account.

Test for Variability, Reliability and Circuit Marginality, which is a new Test topic at DATE, proposes high quality presentations in Session 4.5 that investigate the impact of process variations on parametric measurements, the variability based yield prediction for nanometer lithography, and the impact of voltage scaling on SRAM reliability.

On-Line Testing and Fault Tolerance is again a hot topic at DATE this year. A first session (5.5) describes complex systems able to detect and tolerate faults at different abstraction levels. A second session (7.5) is dedicated to test development and the presentation of novel on-line error detection techniques.

Mixed-Signal/RF Testing and DFX Engineering is also investigated in Session 12.5 that addresses issues on testing, parameter identification and reliability simulation of mixed-signal and RF devices, such as data converters, low-noise amplifiers and voltage controlled oscillators.

In addition to the above technical sessions, two educational tutorials and two special interest workshops dealing with various aspects of Test are part of the DATE conference programme.

Visit these links and read about the detailed DATE 09 technical programme:

Conference - www.date-conference.com/group/date/session-list

Tutorials - www.date-conference.com/conference/date09-monday-tutorials

Friday Workshops - www.date-conference.com/conference/date09-friday-workshops