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Exhibition Programme  


DATE Focus on Business and Industry in the Exhibition Theatre

Once again during DATE 04 there will be a presentation theatre on the exhibition floor hosting the DATE Focus on Business and Industry. Attendees will profit from having an industry forum in the midst of Europe’s largest electronic system design event. The theatre is located close to the main catering areas and so affords easy access for conference delegates during the morning and lunchtime exhibition breaks.

Engineering managers from leading electronics manufacturers will relate their own first-hand design experiences of commercial design tools.

Speaking companies include:
Bull, Thales, AMD, Atmel, Philips, Tower Semiconductor, Alcatel Space, Robert Bosch and Broadcom

Expert panels of users, vendors and analysts will discuss industrial and business topics.

Highlight topics include:
EDA R&D in Europe, Mixed-signal SoC design, HW/SW validation, The Future of FPGAs, Abstract Modelling, Measuring IP Quality, Embedded Software and IC Implementation.

We expect the programme to be attractive and informative for all attendees with many lively and controversial discussions to look forward to. Attendance to the Exhibition and all sessions in the Exhibition Theatre is free of charge.

A full program will be published in the DATE Newsletter.

As a special attraction of the Exhibition Drinks Reception on the Tuesday evening, Aptix will present a panel discussion of Methodologies for SoC Hardware-Software Validation.

:. Programme keyword search
Time Tue, 17 Feb, 2004 Wed, 18 Feb, 2004 Thu, 19 Feb, 2004
1020 VSI Alliance presents:
PANEL:
Common Ground for Measuring IP Quality
edacentrum presents:
PANEL:
EDA R&D in Europe - Does it make sense?
PANEL: Analogue Design for SoC: Red is for Danger
1120 SESSION BREAK edacentrum presents:
PANEL:
Industrial utilization of R&D results on SoC design
SESSION BREAK
1140 Design Verification Experiences RF & MIXED-SIGNAL DESIGN EXPERIENCES
1240 SESSION BREAK SESSION BREAK
1300 PANEL: Should the Future of FPGAs be the Centre of Attention for EDA? SESSION BREAK
1320 EDA Centrum Market Research Report PANEL: Why Has System-Level Design Taken so Long to Gain Momentum?
1440 SESSION BREAK
1420 SESSION BREAK SESSION BREAK
1440 HW-SW CO-DESIGN & CO-VERIFICATION EXPERIENCES IEE Presents: Where is SoC in the 21st Century? PANEL: Determining Which IC Implementation Option is Right for you?
1500 Embedded Workshop: IN-SYSTEM PROGRAMMING OF PROGRAMMABLE DEVICES THROUGH BOUNDARY SCAN
1540 SESSION BREAK  
1600 PANEL: HW Designers Implementing from Embedded SW: Bottleneck or Gridlock? PANEL: Abstract Modelling: Is It Worth the Bother?
1700 SESSION BREAK SESSION BREAK EXHIBITION CLOSE
1800 Panel: Methodologies for SoC Hardware-Software Validation EXHIBITION CLOSE  
1900 EXHIBITION CLOSE    

For Conference Programme click on the links below .:
Monday Tuesday Wednesday Thursday Friday

 

 
Sponsored by the European Design and Automation Association, the EDA Consortium, the IEEE Computer Society - TTTC, ECSI, RAS and ACM SIGDA.