DATE 2005 DESIGNERS' FORUM, AUTHOR INDEX

[A] [B] [C] [D] [E] [F] [G] [H] [I] [J] [K] [L] [M] [N] [O] [P] [Q] [R] [S] [T] [U] [V] [W] [X] [Y] [Z]

A

Ahmed, A.
On the Design and Verification Methodology of the Look-Aside Interface [p. 290]
Amato, P.
Realization of a Virtual Lambda Sensor on a Fixed Precision System [p. 192]
Andersen, T.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Anguille, C.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Anlauf, J.
Hardware Accelerated Collision Detection . An Architecture and Simulation Results [p. 130]

B

Bampi, S.
Area and Throughput Trade-Offs in the Design of Pipelined Discrete Wavelet Transform Architectures [p. 32]
Bardouillet, M.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Bartyzel, B.
Hardware Accelerated Collision Detection . An Architecture and Simulation Results [p. 130]
Bauer, A.
AutoMoDe - Model-Based Development of Automotive Software [p. 171]
Becker, J.
Hardware Support for QoS-Based Function Allocation in Reconfigurable Systems [p. 259]
Benini, L.
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection [p. 198]
Bernardi, P.
Testing Logic Cores Using a BIST P1500 Compliant Approach: A Case of Study [p. 228]
Bjørnsen, J.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Blázquez, R.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Bollaert, T.
C Based Hardware Design for Wireless Applications [p. 124]
Bonnerud, T.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Borgatti, M.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]
Bowyer, B.
C Based Hardware Design for Wireless Applications [p. 124]
Brack, T.
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding [p. 100]
Braun, P.
AutoMoDe - Model-Based Development of Automotive Software [p. 171]
Briskemyr, A.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Buatois, C.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Burchard, A.
A Real-Time Streaming Memory Controller [p. 20]
Burman, S.
FPGA Based Agile Algorithm-on-Demand Co-Processor [p. 82]
Burt, R.
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems [p. 204]

C

Calazans, N.
MultiNoC: A Multiprocessing System Enabled by a Network on Chip [p. 234]
Callicó, G.
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation [p. 2]
Capello, A.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]
Cárcel, L. Alvado
A Coprocessor for Accelerating Visual Information Processing [p. 26]
Cesario, N.
Realization of a Virtual Lambda Sensor on a Fixed Precision System [p. 192]
Chandrakasan, A.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Chappell, S.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]
Chauhan, A.
A Real-Time Streaming Memory Controller [p. 20]
Cheung, P.
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection [p. 8]
Choi, K.-M.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Christiaens, M.
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video [p. 14]
Chung, E.-Y.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Cilardo, A.
A Novel Unified Architecture for Public-Key Cryptography [p. 52]
Clara, M.
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13μm Digital CMOS [p. 223]
Conti, M.
System Level Analysis of the Bluetooth Standard [p. 118]
SystemC Analysis of a New Dynamic Power Management Architecture [p. 177]
Cutajar, R.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]

D

Devos, H.
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video [p. 14]
Donlin, A.
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems [p. 253]
Duller, A.
picoArray Technology: The Tool's Story [p. 106]
Dyka, Z.
Area Efficient Hardware Implementation of Elliptic Curve Cryptography by Iteratively Applying Karatsuba's Method [p. 70]

E

Eeckhaut, H.
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video [p. 14]
Elbaz, R.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Eo, S.-K.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Ernst, R.
Context Sensitive Performance Analysis of Automotive Applications [p. 165]

F

Fahmy, S.
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection [p. 8]
Falconeri, G.
Common Reusable Verification Environment for BCA and RTL Models [p. 272]
Fanucci, L.
Platform Based Design for Automotive Sensor Conditioning [p. 186]
Farouk, H.
An Improved FPGA Implementation of the Modified Hybrid Hiding Encryption Algorithm (MHHEA) for Data Communication Security [p. 76]
Flint, B.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]
Fummi, F.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]

G

Galanis, M.
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms [p. 247]
Giambastiani, A.
Platform Based Design for Automotive Sensor Conditioning [p. 186]
Ginsburg, B.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Goutis, C.
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms [p. 247]
Gray, A.
picoArray Technology: The Tool's Story [p. 106]
Gray, K.
An Assembler Driven Verification Methodology (ADVM) [p. 278]
Groiss, S.
Optical Receiver IC for CD/DVD/Blue-Laser Application [p. 215]
Guiducci, C.
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection [p. 198]
Guillemin, P.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]

H

Habibi, A.
On the Design and Verification Methodology of the Look-Aside Interface [p. 290]
Hagleitner, C.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Hartig, T.
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13μm Digital CMOS [p. 223]
Heinz, D.
An Assembler Driven Verification Methodology (ADVM) [p. 278]
Hekstra-Nowacka, E.
A Real-Time Streaming Memory Controller [p. 20]
Hernes, B.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Herrmann, S.
A Coprocessor for Accelerating Visual Information Processing [p. 26]
Heusala, H.
Modeling of a Reconfigurable OFDM IP Block Family for an RF System Simulator [p. 136]
Hierlemann, A.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Hillman, D.
Using Mobilize Power Management IP for Dynamic and Static Power Reduction in SoC at 130nm [p. 240]
Holt, K.
Wireless LAN: Past, Present, and Future [p. 92]
Horsky, P.
LC Oscillator Driver for Safety Critical Applications [p. 159]

I

Iozzi, F.
Platform Based Design for Automotive Sensor Conditioning [p. 186]

J

Jeffrey, C.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]
Jin, W.
Hardware Support for QoS-Based Function Allocation in Reconfigurable Systems [p. 259]

K

Kachris, C.
Queue Management in Network Processors [p. 112]
Kamakoti, V.
FPGA Based Agile Algorithm-on-Demand Co-Processor [p. 82]
Kienle, F.
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding [p. 100]
Kim, T.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Kim, Y.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Kim, Y.-T.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Kirstein, K.-U.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Kong, J.-T.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Kornaros, G.
Queue Management in Network Processors [p. 112]
Kuttner, F.
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13μm Digital CMOS [p. 223]

L

Lambert, J.-L.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]
Langendörfer, P.
Area Efficient Hardware Implementation of Elliptic Curve Cryptography by Iteratively Applying Karatsuba's Method [p. 70]
Lanzoni, M.
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection [p. 198]
Lee, F.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Leifhelm, M.
Optical Receiver IC for CD/DVD/Blue-Laser Application [p. 215]
Lickess, M.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]
Liedes, J.
Modeling of a Reconfigurable OFDM IP Block Family for an RF System Simulator [p. 136]
López, J.
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation [p. 2]
López, S.
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation [p. 2]
Luk, W.
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection [p. 8]
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems [p. 253]
Lyons, W.
Meeting the Embedded Design Needs of Automotive Applications [p. 142]

M

Macarthur, A.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]
MacBeth, J.
An Assembler Driven Verification Methodology (ADVM) [p. 278]
Marino, C.
Platform Based Design for Automotive Sensor Conditioning [p. 186]
Masera, G.
Testing Logic Cores Using a BIST P1500 Compliant Approach: A Case of Study [p. 228]
Mavroidis, I.
Queue Management in Network Processors [p. 112]
Mayer, A.
Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs [p. 148]
Mazzeo, A.
A Novel Unified Architecture for Public-Key Cryptography [p. 52]
Mazzocca, N.
A Novel Unified Architecture for Public-Key Cryptography [p. 52]
McDonald-Maier, K.
Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs [p. 148]
Meglio, M. Di
Realization of a Virtual Lambda Sensor on a Fixed Precision System [p. 192]
Mello, A.
MultiNoC: A Multiprocessing System Enabled by a Network on Chip [p. 234]
Milev, M.
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems [p. 204]
Milidonis, A.
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms [p. 247]
Mohamed, O.
On the Design and Verification Methodology of the Look-Aside Interface [p. 290]
Moldsvor, Ø.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Möller, L.
MultiNoC: A Multiprocessing System Enabled by a Network on Chip [p. 234]
Moraes, F.
MultiNoC: A Multiprocessing System Enabled by a Network on Chip [p. 234]
Moretti, D.
System Level Analysis of the Bluetooth Standard [p. 118]
Moussa, I.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]

N

Naifer, W.
Common Reusable Verification Environment for BCA and RTL Models [p. 272]
Nikologiannis, A.
Queue Management in Network Processors [p. 112]

O

Olmstead, D.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]
Orphanoudakis, T.
Queue Management in Network Processors [p. 112]

P

Panesar, G.
picoArray Technology: The Tool's Story [p. 106]
Papaefstathiou, I.
Queue Management in Network Processors [p. 112]
Pirozzi, F.
Realization of a Virtual Lambda Sensor on a Fixed Precision System [p. 192]
Powell, J.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Pradeep, R.
FPGA Based Agile Algorithm-on-Demand Co-Processor [p. 82]
Pravadelli, G.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]
Preston, D.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]
Prosser, S.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]

Q

Quaglio, F.
Testing Logic Cores Using a BIST P1500 Compliant Approach: A Case of Study [p. 228]

R

Raabe, A.
Hardware Accelerated Collision Detection . An Architecture and Simulation Results [p. 130]
Reorda, M. Sonza
Testing Logic Cores Using a BIST P1500 Compliant Approach: A Case of Study [p. 228]
Ricc&oagrave;, B.
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection [p. 198]
Richardson, A.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]
Riches, S.
The Integration of On-Line Monitoring and Reconfiguration Functions Using IEEE1149.4 into a Safety Critical Automotive Electronic Control Unit [p. 153]
Rigaud, J.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Rissa, T.
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems [p. 253]
Robbins, W.
picoArray Technology: The Tool's Story [p. 106]
Rocchi, A.
Platform Based Design for Automotive Sensor Conditioning [p. 186]
Romano, L.
A Novel Unified Architecture for Public-Key Cryptography [p. 52]
Romberg, J.
AutoMoDe - Model-Based Development of Automotive Software [p. 171]
Romdhane, N.
Common Reusable Verification Environment for BCA and RTL Models [p. 272]
Rossi, U.
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [p. 266]

S

Saeb, M.
An Improved FPGA Implementation of the Modified Hybrid Hiding Encryption Algorithm (MHHEA) for Data Communication Security [p. 76]
Salo, T.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Sandner, C.
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13μm Digital CMOS [p. 223]
Sannino, R.
Performance Considerations for an Embedded Implementation of OMA DRM 2 [p. 46]
Santner, A.
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13μm Digital CMOS [p. 223]
Sarmiento, R.
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation [p. 2]
Sassatelli, G.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Schätz, B.
AutoMoDe - Model-Based Development of Automotive Software [p. 171]
Schatzmayr, H.
Optical Receiver IC for CD/DVD/Blue-Laser Application [p. 215]
Schrauwen, B.
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video [p. 14]
Schulze, A.
Context Sensitive Performance Analysis of Automotive Applications [p. 165]
Sedivy, J.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Serpanos, D.
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach [p. 64]
Shimizu, T.
A Formal Verification Methodology for Checking Data Integrity [p. 284]
Shin, C.
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture [p. 138]
Siebert, H.
Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs [p. 148]
Silva, S.
Area and Throughput Trade-Offs in the Design of Pipelined Discrete Wavelet Transform Architectures [p. 32]
Simón, J. Lidón
A Coprocessor for Accelerating Visual Information Processing [p. 26]
Simunic, T.
Power Saving Techniques for Wireless LANs [p. 96]
Soudris, D.
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms [p. 247]
Stagni, C.
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection [p. 198]
Staschulat, J.
Context Sensitive Performance Analysis of Automotive Applications [p. 165]
Stechele, W.
A Coprocessor for Accelerating Visual Information Processing [p. 26]
Stroobandt, D.
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video [p. 14]
Sturm, J.
Optical Receiver IC for CD/DVD/Blue-Laser Application [p. 215]
Sullivan, C.
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems [p. 180]

T

Tahar, S.
On the Design and Verification Methodology of the Look-Aside Interface [p. 290]
Takach, A.
C Based Hardware Design for Wireless Applications [p. 124]
Telstø, F.
A 97mW 110 MS/s 12b Pipeline ADC Implemented in 0.18μm Digital CMOS [p. 219]
Theodoridis, G.
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms [p. 247]
Thull, D.
Performance Considerations for an Embedded Implementation of OMA DRM 2 [p. 46]
Tiri, K.
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs [p. 58]
Torres, L.
Hardware Engines for Bus Encryption: A Survey of Existing Techniques [p. 40]
Towner, D.
picoArray Technology: The Tool's Story [p. 106]

U

Ullmann, M.
Hardware Support for QoS-Based Function Allocation in Reconfigurable Systems [p. 259]
Umezawa, Y.
A Formal Verification Methodology for Checking Data Integrity [p. 284]

V

Vancura, T.
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring [p. 210]
Verbauwhede, I.
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs [p. 58]
Vijaykrishnan, N.
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach [p. 64]
Vinay, S.
FPGA Based Agile Algorithm-on-Demand Co-Processor [p. 82]

W

Wehn, N.
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding [p. 100]
Wentzloff, D.
Direct Conversion Pulsed UWB Transceiver Architecture [p. 94]
Wolf, F.
Context Sensitive Performance Analysis of Automotive Applications [p. 165]
Wolf, W.
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach [p. 64]
Multimedia Applications of Multiprocessor Systems-on-Chips [p. 86]

X

Xie, Y.
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach [p. 64]

Y

Yang, S.
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach [p. 64]

Z

Zachmann, G.
Hardware Accelerated Collision Detection . An Architecture and Simulation Results [p. 130]
Ziegenbein, D.
AutoMoDe - Model-Based Development of Automotive Software [p. 171]
Zimmermann, H.
Optical Receiver IC for CD/DVD/Blue-Laser Application [p. 215]